
Bonded Fin Heat Sinks
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Power loss is the difference between input and output power: P_V = P_in − P_out = P_in · (1 − η). All of it turns into heat that the heat sink has to remove. In power semiconductors it consists mainly of conduction and switching losses, which this calculator determines from datasheet values.
No converter is lossless. Whatever electrical power does not reach the output is turned into heat in semiconductors, inductors, capacitors and copper traces. That heat raises the junction temperature and has to pass through the package, the thermal interface material and the heat sink into air or coolant. This is why power loss is the first input of every thermal design. In a power semiconductor it is made up of these parts:
All equations give average values over one switching period or one fundamental period. Always use datasheet values at the expected junction temperature.
P_V = P_in − P_out Conservation of energy: whatever does not reach the output becomes heat.
P_V = P_in · (1 − η) When the input power is known, for example from a measurement at the mains input.
P_V = P_out · (1/η − 1) When the output power is known, for example the rated power of an inverter. At 10 kW output and 97 % efficiency that is about 309 W.
P_cond = I_rms² · R_DS(on)(T_j) Conduction losses from RMS current and on-state resistance at operating temperature. For silicon MOSFETs, R_DS(on) rises roughly 1.5 to 2 times between 25 °C and 125 °C. The exact factor comes from the R_DS(on) versus T_j curve in the datasheet.
P_sw = (E_on + E_off) · f_sw Switching losses from the datasheet switching energies. They come from a double-pulse test and include effects such as output capacitance and reverse recovery of the opposite diode. They only apply to the voltage, current, gate resistance and temperature of that test.
P_sw ≈ ½ · V_DS · I_D · (t_r + t_f) · f_sw Linear approximation for hard switching when no switching energies are given. It often underestimates the losses because output capacitance and reverse recovery are missing, and the datasheet switching times only hold for the gate resistance stated there.
P_V = P_cond + P_sw Total MOSFET losses. The gate-drive power Q_G · V_GS · f_sw is mostly dissipated in the driver and gate resistor and barely heats the chip.
P_cond = V_CE0 · I_avg + r_CE · I_rms² The on-state characteristic is approximated by a straight line made of threshold voltage V_CE0 and slope resistance r_CE. That is why average and RMS current enter separately.
P_sw = (E_on + E_off) · f_sw · (V_DC / V_ref) · (I / I_ref) Switching losses from the datasheet energies, scaled linearly to your operating point. This is an approximation: the energies do not depend exactly linearly on voltage and current, and more detailed models use exponents.
P_sw = (1/π) · (E_on + E_off) · f_sw · (V_DC / V_ref) · (Î / I_ref) In an inverter with sinusoidal current, each IGBT switches only during one half-wave and at a changing current. Using the peak value Î and the factor 1/π gives the average over one fundamental period.
I_avg = Î · (1/(2π) + m · cos φ / 8), I_rms² = β · (1/8 + m · cos φ / (3π)) Average and RMS IGBT current in a sinusoidally modulated inverter, depending on modulation index m and power factor cos φ. For the diode the same expressions apply with a minus sign before the m term.
P_D = V_F0 · I_F,avg + r_F · I_F,rms² + E_rr · f_sw Diode conduction losses plus reverse-recovery losses at commutation. Scale E_rr to the operating point in the same way as the transistor energies.
P_rr ≈ Q_rr · V_DS · f_sw Estimate for MOSFET half bridges when only the reverse-recovery charge Q_rr of the body diode is given. A large part of this loss occurs in the opposite switch at turn-on.
A 650 V SiC MOSFET in a TO-247 package runs in a hard-switched DC/DC converter. It switches 20 A at 400 V with f_sw = 20 kHz, and the RMS current through the transistor is 15 A. For an assumed junction temperature of 100 °C, the datasheet gives R_DS(on) = 40 mΩ and, at 400 V and 20 A, a switching energy E_on + E_off = 250 µJ. The thermal path consists of R_th,jc = 0.6 K/W, an insulating thermal pad with 0.4 K/W and a heat sink with 2.5 K/W at T_a = 40 °C. The values are generic but typical for this device class.
P_cond = I_rms² · R_DS(on) = (15 A)² · 0.040 Ω = 9.0 W P_sw = (E_on + E_off) · f_sw = 250 µJ · 20 kHz = 5.0 W P_V = P_cond + P_sw = 9.0 W + 5.0 W = 14.0 W For comparison, linear approximation with t_r + t_f = 35 ns: ½ · 400 V · 20 A · 35 ns · 20 kHz = 2.8 W T_j = T_a + P_V · R_th,ja = 40 °C + 14.0 W · (0.6 + 0.4 + 2.5) K/W = 89 °C At 89 °C the junction temperature is below the assumed 100 °C, so the R_DS(on) used is slightly conservative and no further iteration is needed. The linear approximation would have clearly underestimated the switching losses at 2.8 W instead of 5.0 W.
Power loss alone does not tell you whether a device runs too hot. Only together with the thermal resistance does it give you a temperature.
T_j = T_a + P_V · R_th,ja Power loss and the total thermal resistance from junction to ambient give you T_j. If it is well below T_j,max, the cooling is sufficient.
Calculate junction temperature →R_th,sa ≤ (T_j,max − T_a) / P_V − R_th,jc − R_th,cs The other way round, P_V gives the highest permissible thermal resistance of the heat sink. Plan in a margin to T_j,max.
Calculate thermal resistance →The formulas are quick to apply. Whether the result holds up depends on the input values.
A reliable loss calculation only needs a few parameters. What matters is reading them in the right place and at the right temperature.
| Parameter | Where in the datasheet | Note |
|---|---|---|
| R_DS(on) | Static characteristics, R_DS(on) versus T_j diagram | Value at the expected T_j, maximum value for the worst case. |
| E_on, E_off | Switching characteristics, E versus I_D or I_C and versus R_G diagrams | Valid for the test voltage, current, gate resistance and temperature. |
| t_r, t_f | Switching times | Only for the linear approximation, strongly dependent on driver and R_G. |
| V_CE0, r_CE | Output characteristic I_C versus V_CE at 125 or 150 °C | Fit a straight line through the operating range: the intercept with the voltage axis is V_CE0, r_CE = ΔV_CE / ΔI_C. |
| V_F0, r_F | Diode forward characteristic I_F versus V_F | Linearise as for the IGBT. |
| E_rr, Q_rr | Diode reverse-recovery characteristics | Usually given as E_rr for IGBT modules, often only Q_rr of the body diode for MOSFETs. |
| R_th,jc | Thermal characteristics | For the next step, calculating the junction temperature. |
The rating refers to the power loss that one device or one heat sink has to remove. The limits are guide values: in the end, what decides is the permissible thermal resistance and the heat flux density, i.e. watts per square centimetre of chip or base plate area. The thermal resistance column assumes a permissible heat sink temperature rise of about 40 K above ambient.
| Power loss per device | Typical cooling | Required R_th,sa at 40 K |
|---|---|---|
| below 20 W | Air cooling with an extruded heat sink, often by natural convection | above 2 K/W |
| 20 to 150 W | Bonded-fin or pin-fin heat sink with fan, liquid cooling where space is tight | about 2 to 0.3 K/W |
| above 150 W | Mostly liquid cooling with a cold plate, large air-cooled heat sinks for modules with a large base plate | below 0.3 K/W |
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